Energy Efficient In-Memory Computing Platform Based On 4-Terminal Spin Hall Effect-Driven Domain Wall Motion Devices

Keywords

Domain wall motion device; In-memory computing; Spin Hall effect

Abstract

In this paper, we propose an energy efficient in-memory computing platform based on novel 4-terminal spin Hall effect-driven domain wall motion devices that could be employed as both non-volatile memory cell and in-memory logic unit. The proposed designs lead to unity of memory and logic. The device to architecture level simulation results show that, with 45% area increase, the proposed in-memory computing platform achieves the write energy ∼ 15.6 fJ/bit which is more than one order lower than that of standard 1-transistor 1-magnetic tunnel junction counterpart while keeping the identical 1ns writing speed. In addition, the proposed in-memory logic scheme improves the operating energy by 61.3% as compared with the conventional nonvolatile in-memory logic designs.

Publication Date

5-10-2017

Publication Title

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Volume

Part F127756

Number of Pages

77-82

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

DOI Link

https://doi.org/10.1145/3060403.3060459

Socpus ID

85021227901 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/85021227901

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