Leveraging All-Spin Logic To Improve Hardware Security

Abstract

Due to the globalization of Integrated Circuit (IC) design in the semiconductor industry and the outsourcing of chip manufacturing, third Party Intellectual Properties (3PIPs) become vulnerable to IP piracy, reverse engineering, counterfeit IC, and hardware trojans. A designer has to employ a strong technique to thwart such attacks, e.g. using Strong Logic Locking method [1]. But, such technique cannot be used to protect some circuits since the inserted key-gates rely on the topology of the circuit. Also, it requires higher power, delay, and area overheads compared to other techniques. In this paper, we present the use of spintronic devices to help protect ICs with less performance overhead. We then evaluate the proposed design based on security metric and performance overhead. One of the best spintronic device candidates is the All Spin Logic due to its unique properties: small area, no spin-charge signal conversion, and its compatibility with conventional CMOS technology.

Publication Date

5-10-2017

Publication Title

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Volume

Part F127756

Number of Pages

491-494

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

DOI Link

https://doi.org/10.1145/3060403.3060471

Socpus ID

85021207912 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/85021207912

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