Keywords
NBTI, Charge trapping, current mirror, operation amplifier, inverter, ring oscillator
Abstract
Nanoscale p-channel transistors under negative gate bias at an elevated temperature show threshold voltage degradation after a short period of stress time. In addition, nanoscale (45 nm) n-channel transistors using high-k (HfO2) dielectrics to reduce gate leakage power for advanced microprocessors exhibit fast transient charge trapping effect leading to threshold voltage instability and mobility reduction. A simulation methodology to quantify the circuit level degradation subjected to negative bias temperature instability (NBTI) and fast transient charge trapping effect has been developed in this thesis work. Different current mirror and two-stage operation amplifier structures are studied to evaluate the impact of NBTI on CMOS analog circuit performances for nanoscale applications. Fundamental digital circuit such as an eleven-stage ring oscillator has also been evaluated to examine the fast transient charge transient effect of HfO2 high-k transistors on the propagation delay of ring oscillator performance. The preliminary results show that the negative bias temperature instability reduces the bandwidth of CMOS operating amplifiers, but increases the amplifier's voltage gain at mid-frequency range. The transient charge trapping effect increases the propagation delay of ring oscillator. The evaluation methodology developed in this thesis could be extended to study other CMOS device and circuit reliability issues subjected to electrical and temperature stresses.
Notes
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Graduation Date
2007
Semester
Fall
Advisor
Yuan, Jiann S.
Degree
Master of Science in Electrical Engineering (M.S.E.E.)
College
College of Engineering and Computer Science
Department
Electrical Engineering and Computer Science
Degree Program
Electrical Engineering
Format
application/pdf
Identifier
CFE0001930
URL
http://purl.fcla.edu/fcla/etd/CFE0001930
Language
English
Release Date
December 2007
Length of Campus-only Access
None
Access Status
Masters Thesis (Open Access)
STARS Citation
Yu, Yixin, "Negative Bias Temperature Instability And Charge Trapping Effects On Analog And Digital Circuit Reliability" (2007). Electronic Theses and Dissertations. 3424.
https://stars.library.ucf.edu/etd/3424