Modeling the Heterojunction Bipolar Transistor for Computer Aided Simulation

Abstract

The GaAs heterojunction bipolar transistor (HBT) is a relatively new device that has proven to operate faster, consume less power, operate over a wider temperature range and have a higher tolerance to radiation exposure than the silicon homojunction transistor. The growing acceptance of the GaAs HBT has prompted the need for an accurate analytical model of the device to perform simulations of GaAs HBT circuits. The presence of unequal barrier heights at the heterojunction allows for the high doping and narrowing of the base, which effectively increases both the gain and the cutoff frequency of the HBT. One major drawback of the HBT, however, is the presence of an offset voltage from the emitter to the collector. This voltage raises the output low voltage in saturating logic circuits which reduces the low noise margin and also increases the device power consumption, both undesirable traits. An analytical model for the collector-emitter offset voltage is developed, allowing for the isolating of the controlling parameters such that the offset voltage can be minimized and the device tradeoffs determined.

Notes

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Graduation Date

1990

Semester

Fall

Advisor

Liou, Juin J.

Degree

Master of Science (M.S.)

College

College of Engineering

Department

Electrical Engineering and Communication Sciences

Degree Program

Electrical Engineering

Format

Print

Pages

107 p.

Language

English

Length of Campus-only Access

None

Access Status

Masters Thesis (Open Access)

Identifier

DP0027263

Subjects

Dissertations, Academic -- Engineering; Engineering -- Dissertations, Academic

Accessibility Status

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