Keywords
Electronic data processing, Machinery design, Sequential machine theory
Abstract
This report will demonstrate the design techniques to translate a given scanning algorithm into a hardwired pre-processor. The language to be "pre-processed" is TRAC (Text Reckoning and Compiling) devised by Mooers and Deutsch. The major drawback in the current implementation of TRAC is speed. The software overhead required for string manipulations and execution of the input scanning algorithm is the major degrading factor. A TRAC machine consisting of a hardwired pre-processor to scan the input and produce formatted data for a stack oriented evaluator is proposed. The control machine for the input scanning algorithm for the pre-processor is designed using various sequential machine design techniques. The one-hot code and the minimum state variable design represent the two extremes which are presented.
Notes
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Graduation Date
1973
Advisor
Petrasko, Brian E.
Degree
Master of Science (M.S.)
College
College of Engineering
Degree Program
Engineering
Format
Pages
43 p.
Language
English
Rights
Public Domain
Length of Campus-only Access
None
Access Status
Masters Thesis (Open Access)
Identifier
DP0012934
Subjects
Electronic data processing -- Machinery -- Design, Sequential machine theory
STARS Citation
Cotton, Raymond F., "Investigation of Sequential Machine Design Techniques for Implementation of a TRAC Scanning Algorithm" (1973). Retrospective Theses and Dissertations. 49.
https://stars.library.ucf.edu/rtd/49
Contributor (Linked data)
University of Central Florida. College of Engineering [VIAF]
Collection (Linked data)
Accessibility Status
Searchable text