Title

Cmos Rf Low-Noise Amplifier Design For Wireless Communication

Abstract

Design and optimization of a CMOS low-noise amplifier have been presented. Typical noise parameters such as minimum noise figure, equivalent noise resistance, and optimum source conductance using deep submicron CMOS technology including effect of bias-dependent gate resistance of the MOSFET are derived. Noise parameters, gain, and power consumption are simultaneously optimized using closed-form analytical equations. The analytical equations provide fast turn-around design time in mixed-signal ICs for telecommunication applications.

Publication Date

1-1-2000

Publication Title

Midwest Symposium on Circuits and Systems

Volume

3

Number of Pages

1306-1309

Document Type

Article

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/MWSCAS.2000.951455

Socpus ID

0034466867 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/0034466867

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