Title

Investigation Of Sub-10-Nm Diameter, Gate-All-Around Nanowire Field-Effect Transistors For Electrostatic Discharge Applications

Keywords

Electrostatic discharge (ESD); Failure current; Leakage current (I ) leakage; Nanowire; On-resistance (R ) on

Abstract

Electrostatic discharge (ESD) robustness of a promising nanoscaled device, the gate-all-around nanowire field-effect transistor (NW FET), was characterized for the first time using the transmission-line pulsing technique. The effects of gate length, nanowire dimension, and nanowire count on the failure current, leakage current, trigger voltage, and on-resistance were investigated. ESD performances of the gate-all-around NW FET and other nanostructure devices, such as the poly-Si nanowire thin-film transistor and FinFET were also compared and discussed. © 2006 IEEE.

Publication Date

5-1-2010

Publication Title

IEEE Transactions on Nanotechnology

Volume

9

Issue

3

Number of Pages

352-354

Document Type

Article

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/TNANO.2009.2038225

Socpus ID

77952634929 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/77952634929

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