In-Memory Computing With Spintronic Devices

Keywords

Domain Wall Memory; In-Memory Computing; In-Memory Data Encryption; Racetrack Memory; SOT-MRAM

Abstract

In-Memory computing has drawn many attentions as a promising solution to reduce massive power hungry data traffic between computing and memory units, leading to significant improvement of entire system performance and energy efficiency. Emerging spintronic device based non-volatile memory is becoming a next-generation universal memory candidate due to its non-volatility, zero leakage power in un-accessed bit-cell, high integration density, excellent endurance and compatibility with CMOS fabrication technology. In this paper, we present that different spintronic devices based memory, including spin-orbit torque magnetic random access memory (SOT-MRAM), domain wall motion memory, magnetic racetrack memory, could be leveraged to implement logic functions within memory without add-on logic circuits. As a case study, we employ Advanced Encryption Standard (AES) algorithm to elucidate the efficiency of such in-memory computing based on spintronic memory.

Publication Date

7-20-2017

Publication Title

Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI

Volume

2017-July

Number of Pages

683-688

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/ISVLSI.2017.116

Socpus ID

85027286305 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/85027286305

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